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TC4421/TC4422
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin No.
8-Pin PDIP,
SOIC
1
2
3
4
5
6
7
8
—
—
Pin No.
8-Pin DFN
1
2
3
4
5
6
7
8
PAD
—
Pin No.
5-Pin TO-220
—
1
—
2
4
5
—
3
—
TAB
Symbol
V DD
INPUT
NC
GND
GND
OUTPUT
OUTPUT
V DD
NC
V DD
Description
Supply input, 4.5V to 18V
Control input, TTL/CMOS compatible input
No connection
Ground
Ground
CMOS push-pull output
CMOS push-pull output
Supply input, 4.5V to 18V
Exposed metal pad
Metal tab is at the V DD potential
3.1
Supply Input (V DD )
3.3
CMOS Push-Pull Output
The V DD input is the bias supply for the MOSFET driver
and is rated for 4.5V to 18V with respect to the ground
pin. The V DD input should be bypassed to ground with
a local ceramic capacitor. The value of the capacitor
should be chosen based on the capacitive load that is
being driven. A minimum value of 1.0 μF is suggested.
The MOSFET driver output is a low-impedance,
CMOS, push-pull style output capable of driving a
capacitive load with 9.0A peak currents. The MOSFET
driver output is capable of withstanding 1.5A peak
reverse currents of either polarity.
3.4
Ground
3.2
Control Input
The ground pins are the return path for the bias current
The MOSFET driver input is a high-impedance,
TTL/CMOS compatible input. The input also has
300 mV of hysteresis between the high and low
thresholds that prevents output glitching even when the
rise and fall time of the input signal is very slow.
and for the high peak currents that discharge the load
capacitor. The ground pins should be tied into a ground
plane or have very short traces to the bias supply
source return.
3.5
Exposed Metal Pad
The exposed metal pad of the 6x5 DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
DS21420D-page 8
? 2004 Microchip Technology Inc.
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